04903344 is referenced by 98 patents and cites 7 patents.

In a semiconductor memory device of an open bit line configuration including a plurality of memory cells arranged in rows and columns, bit lines for adjacent columns are offset by about half their length in the column direction, and each bit line is terminated so as not to overlap, in the vertical direction, the sense amplifier of the bit line for the next column.

Title
Semiconductor memory device with staggered sense amplifiers
Application Number
7/215624
Publication Number
4903344
Application Date
July 6, 1988
Publication Date
February 20, 1990
Inventor
Hiroshi Inoue
Tokyo
JP
Agent
Spencer & Frank
Assignee
Oki Electric
JP
IPC
G11C 5/06
G11C 11/40
G11C 7/00
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