04858105 is referenced by 324 patents and cites 17 patents.

A pipelined data processor comprises a circuit for storing two instructions in a pair of instruction registers, a circuit for detecting whether those instructions are a combination of an instruction requesting the use of an operation unit and an instruction requesting the use of another resource, and a circuit to control the execution of the instructions when the decision of the detection circuit is affirmative such that those instructions are executed by the operation unit and the resource in a plurality of stages.

Title
Pipelined data processor capable of decoding and executing plural instructions in parallel
Application Number
7/30434
Publication Number
4858105
Application Date
March 26, 1987
Publication Date
August 15, 1989
Inventor
Kiyoshi Inoue
Tokyo
JP
Eiki Kamada
Hachioji
JP
Tohru Shonai
Kokubunji
JP
Akira Yamaoka
Hachioji
JP
Yooichi Shintani
Kokubunji
JP
Kazunori Kuriyama
Kokubunji
JP
Agent
Antonelli Terry & Wands
Assignee
Hitachi
JP
IPC
G06F 15/00
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