04855947 is referenced by 48 patents and cites 6 patents.

An interlock of an instruction processing pipeline in a data processing system responsive to the validity of the pipeline stages within the instruction unit pipeline under microprogram control, is provided. Thus, a microprogram can provide for the release of a particular pipeline stage based on a selected characteristic of the valid signals generated by other stages of the pipeline. An interlock control signal is generated by a decode of a field in a microinstruction stored in a control store RAM or through hardwired decoding.

Title
Microprogrammable pipeline interlocks based on the validity of pipeline states
Application Number
7/54947
Publication Number
4855947
Application Date
May 27, 1987
Publication Date
August 8, 1989
Inventor
Robert M Maier
San Jose
CA, US
Allan J Zmyslowski
Sunnyvale
CA, US
Agent
Fliesler Dubb Meyer & Lovejoy
Assignee
Amdahl Corporation
CA, US
IPC
G06F 13/14
G06F 9/38
G06F 9/28
View Original Source