04852092 is referenced by 31 patents and cites 8 patents.

In an error recovery system for use in combination with a multiprocessor system processing instructions under microprogram control which is energized on occurrence of an intermittent error in one of the processors to restart the microprogram from a checkpoint in the faulty processor when the microstep restart is allowable and which is energized upon occurrence of a physical error to make another processor take over execution of an instruction processed in the faulty processor, the faulty processor generates a physical error signal after completion of the microprogram restart so that another processor is forced to take over next succeeding procession to be carried out in the faulty processor. When retry of execution of the instruction is allowable on occurrence of the intermittent error, another processor is also forced to take over execution of the instruction. A retry request can previously and manually be inputed into the one processor by an operator so that retry of execution of the instruction is carried out in the faulty processor.

Title
Error recovery system of a multiprocessor system for recovering an error in a processor by making the processor into a checking condition after completion of microprogram restart from a checkpoint
Application Number
7/86638
Publication Number
4852092
Application Date
August 18, 1987
Publication Date
July 25, 1989
Inventor
Akihisa Makita
Tokyo
JP
Agent
Foley & Lardner Schwartz Jeffery Schwaab Mack Blumenthal & Evans
Assignee
NEC Corporation
JP
IPC
G06F 11/00
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