04849875 is referenced by 41 patents and cites 20 patents.

A computer system includes a computer address modification system that is advantageously coupled in a bus network to selectively translate memory address data in 16K blocks and provide DMA page addresses in 16K blocks which may match the 16K memory address blocks. The modification system includes a mapping RAM selectively providing translated addresses to enable addresses in a 16 megabyte extended address space. The modification system also includes a page register storing for each addressable 16K block of data for each DMA channel a page address within the extended address space.

Title
Computer address modification system with optional DMA paging
Application Number
20964
Publication Number
4849875
Application Date
August 10, 1987
Publication Date
July 18, 1989
Inventor
Robert G Taylor Jr
Santa Cruz
CA, US
William G Swinton
Santa Cruz
CA, US
Allen J Larsen
Campbell
CA, US
Bruce A Fairman
Woodside
CA, US
Agent
Scherlacher Mok & Roth
Assignee
Tandon Corporation
CA, US
IPC
G06F 13/28
G06F 13/00
G06F 9/36
View Original Source