04843542 is referenced by 99 patents and cites 8 patents.

A system for maintaining data consistency among distributed processors, each having its associated cache memory. A processor addresses data in its cache by specifying the virtual address. The cache will search its cells for the data associatively. Each cell has a virtual address, a real address, flags and a plurality of associated data words. If there is no hit on the virtual address supplied by the processor, a map processor supplies the equivalent real address which the cache uses to access the data from another cache if one has it, or else from real memory. When a processor writes into a data word in the cache, the cache will update all other caches that share the data before allowing the write to the local cache.

Title
Virtual memory cache for use in multi-processing systems
Application Number
6/930172
Publication Number
4843542
Application Date
November 12, 1986
Publication Date
June 27, 1989
Inventor
James A Steffen
Long Beach
CA, US
Ronald E Rider
Menlo Park
CA, US
Bindiganavele A Prasad
Torrance
CA, US
Stephen R Dashiell
Pasadena
CA, US
Agent
Robert E Cuhya
Assignee
Xerox Corporation
CT, US
IPC
G06F 13/00
G06F 12/06
G06F 12/00
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