04814978 is referenced by 94 patents and cites 35 patents.

This invention provides a novel computer design that is capable of utilizing large numbers of very large scale integrated (VLSI) circuit chips as a basis for efficient high performance computation. This design is a static dataflow architecture of the type in which a plurality of dataflow processing elements communicate externally by means of input/output circuitry, and internally by means of packets sent through a routing network that implements a transmission path from any processing element to any other processing element. This design effects processing element transactions on data according to a distribution of instructions that is at most partially ordered. These instructions correspond to the nodes of a directed graph in which any pair of nodes connected by an arc corresponds to a predecessor-successor pair of instructions. Generally each predecessor instruction has one or more successor instructions, and each successor instruction has one or more predecessor instructions. In accordance with the present invention, these instructions include associations of execution components and enable components identified by instruction indices.

Title
Dataflow processing element, multiprocessor, and processes
Application Number
6/885836
Publication Number
4814978
Application Date
July 15, 1986
Publication Date
March 21, 1989
Inventor
Jack B Dennis
Belmont
MA, US
Agent
Gerald Altman
Assignee
Dataflow Computer Corporation
MA, US
IPC
G06F 15/00
G06F 13/00
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