04799009 is referenced by 31 patents and cites 2 patents.

A wafer testing device in which a plurality of wafers can be tested simultaneously significantly reducing the time required for testing each chip. A prober is provided which receives a wafer to be tested. A probe card is coupled to the prober having a window through which a plurality of semiconductor memory chips on the wafer are observable. A plurality of probes are coupled to the periphery of the window in such a manner that the probes can be brought into contact with bonding pads on the plurality of semiconductor memory chips. A tester is connected to the probes which is capable of simultaneously testing each of the plurality of chips.

Title
Semiconductor testing device
Application Number
200354
Publication Number
4799009
Application Date
March 31, 1983
Publication Date
January 17, 1989
Inventor
Keisuke Okada
Hyogo
JP
Tetsuo Tada
Hyogo
JP
Agent
Sughrue Mion Zinn Macpeak & Seas
Assignee
VLSI Technology Research Association
JP
IPC
G01R 31/02
G01R 1/06
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