04763184 is referenced by 40 patents and cites 16 patents.

A circuit for protecting an input MOS FET (Q1) from electrostatic discharge pulses includes a plurality of diodes (D112a through D112f) coupled to the bonding pad (102) of an integrated circuit via a plurality of resistors (R110a through R110f). The resistors prevent excessive current from flowing through and hence damaging any of the diodes. The diodes possess a unique shape which maximizes the perimeter to surface area ratio and therefore permits more efficient energy dissipation along the periphery of the diodes. The diodes are adapted to break down in response to an excessive voltage at the bonding pad and therefor protect the gate structure of the input transistor. Also included in the circuit is a protective bipolar transistor (Q2) having a collector coupled to the bonding pad, an emitter coupled to ground and a base resistively coupled to ground. When a large voltage is applied to the bonding pad and the break down of the diodes is insufficient to limit the voltage at the bonding pad, the collector base junction of the bipolar transistor breaks down thus providing an added element of protection for the input MOS FET. The circuit of the present invention also includes a second resistor diode network which further attenuates the voltage presented to the gate of the input transistor.

Title
Input circuit for protecting against damage caused by electrostatic discharge
Application Number
6/728738
Publication Number
4763184
Application Date
April 30, 1985
Publication Date
August 9, 1988
Inventor
Boaz Eitan
Sunnyvale
CA, US
Gadi Krieger
Stanford
CA, US
Agent
Paul J Winters
Alan H MacPherson
Kenneth E Leeds
Assignee
WaferScale Integration
CA, US
IPC
H02H 9/00
H01L 29/72
H01L 27/02
H01L 29/78
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