A microcomputer based fault detector for identifying a phase reversal, a phase loss, and a power loss in three-phase circuits. A microcomputer samples a pattern of timing signals generated in response to three current transformers associated with each of the three phases. The changing pattern of timing signals represent the phase relationship of each of the three phases. The sampling rate of the microcomputer is synchronized to the alternating current in each of the three phases by an interrupt signal indirectly generated by one of the phases. In the absence of current in this interrupt generating phase, a backup interrupt, internal to the microcomputer, is enabled which directs the microcomputer to determine if the absence of the first interrupt is due to a phase loss or a power loss. Either interrupt prompts the microcomputer to sample the pattern of signals and compare it to a predetermined pattern. By counting any deviant patterns and classifying them as characteristic of either a phase reversal, phase loss, or power loss, the microcomputer identifies the specific fault as the occurrence of a predetermined number of deviant patterns within a classification.