04682122 is referenced by 7 patents and cites 1 patents.

A frequency synthesizer for adding large frequency steps to an initial frequency. A first phase lock loop divides the input frequency Fo+.DELTA.(.DELTA. being the sum of smaller frequency steps) by a rational division factor and adds to the result a standard frequency P in a fixed integral ratio with the large frequency steps to form an intermediate frequency Fi. A second phase lock loop (O.sub.S -E-G-D.sub.3 -CPF.sub.2 -FL.sub.3) multiplies the intermediate frequency by a rational factor, equal to (N+1)/D. This second loop first divides (in D.sub.3) the intermediate frequency by an integral fixed ratio D and then compares (in CPF.sub.2) the result Fi/D to a beat between the output frequency Fs and a harmonic N-Fi of the intermediate frequency.

Title
Frequency synthesizer stage adding high frequency steps to an initial frequency
Application Number
6/786975
Publication Number
4682122
Application Date
October 15, 1985
Publication Date
July 21, 1987
Inventor
Roger Charbonnier
Meudon Bellevue
FR
Joel Remy
Paris
FR
Agent
William A Drucker
Assignee
Adret Electronique
FR
IPC
H03L 7/18
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