Amplifiers, optionally having complementary (positive and negative) outputs, are connected to a matrix of input and output conductors (where the output conductors are each a pair for the case of complementary amplifier outputs). Each connection is implemented with a resistors R.sub.ij =R.sub.ji connecting the output(s) of amplifiers j to the input of amplifiers i, and vice versa, where i and j are the ith and jth amplifiers not necessarily in sequence. The value of each resistor is selected for the nature of the decisional operation intended to satisfy the following circuit equation of motion ##EQU1## where V.sub.j =g(u.sub.j) the output of amplifier j due to an input u.sub.i, C.sub.i is the input capacitance of amplifier i, and R.sub.i is the equivalent of p.sub.i and R.sub.ij according to the equation ##EQU2## and R.sub.ij =R.sub.ji. For the implementation of an associative memory, only positive (or negative) output terminals need be connected by resistors of unit value to input terminals of amplifiers i and j for the amplifier i in which a binary 1 is to be stored. (The amplifier j is one or more of the other amplifiers.) The outputs of the array of amplifiers will produce the entire word stored in response to a few bit-1 input signals I.sub.i to amplifiers so connected by resistors R.sub.ij. For problem solution, the resistance R.sub.ij =R.sub.ji is selected to have a value that, with appropriate signals at all input conductors (perhaps zero) the network will collectively drive to a stable state at the complementary output terminals which provide an output code word that is a very good solution to the problem.