04620299 is referenced by 7 patents and cites 1 patents.

A logic decoder provides a true output signal at a first logic state when selected during an active cycle and during an inactive cycle, and at a second logic state when deselected. The logic decoder also provides a complementary output signal. A word line driver circuit couples decoded address signals to respective word lines when the output signal is in the first logic state. A coupling circuit couples one of first and second word lines to ground during the active cycle. A coupling transistor couples the first and second word lines together in response to receiving the complementary output signal at the first logic state.

Title
Row decoder
Application Number
6/709262
Publication Number
4620299
Application Date
March 4, 1985
Publication Date
October 28, 1986
Inventor
William L Martino Jr
Austin
TX, US
Scott Remington
Austin
TX, US
Agent
James L Clingan Jr
Jeffrey Van Myers
Anthony J Sarli Jr
Assignee
Motorola
IL, US
IPC
G11C 7/02
G11C 8/00
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