04617479 is referenced by 295 patents and cites 7 patents.

The programmable logic array device basically comprises a programmable AND array (FIGS. 5, 11) having a plurality of memory cells (30, 31) arranged in addressable rows (40-45) and columns (32-38) and which can be individually programmed to contain logic data; an input circuit (FIG. 9) for receiving an input signal and for developing a buffered signal corresponding thereto; a first row driver (FIG. 10) responsive to the buffered signal and operative to interrogate a particular row of the memory cells and to cause the AND array to output signals corresponding to the data contained therein; first sensing circuitry (FIG. 12) for sensing the signals output by the AND array and for developing corresponding data signals which are the logical OR of signals output by the AND array; first output terminal circuitry; and first switching circuitry (FIG. 14) responsive to a control signal and operative to couple the data signal either into the storage circuitry or to the output terminal circuitry (FIG. 16). The device has the advantages generally of greater logic density and lower system power than standard family logic components.

Title
Programmable logic array device using EPROM technology
Application Number
6/607018
Publication Number
4617479
Application Date
May 3, 1984
Publication Date
October 14, 1986
Inventor
Jung Hsing Ou
Sunnyvale
CA, US
Yiu Fai Chan
Saratoga
CA, US
Sau Ching Wong
Hillsborough
CA, US
Robert F Hartmann
San Jose
CA, US
Agent
Hamrick Hoffman Guillot & Kazubowski
Assignee
Altera Corporation
CA, US
IPC
H03K 19/094
H03K 19/20
H03K 19/177
G06F 7/00
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