04615005 is referenced by 140 patents and cites 15 patents.

Disclosed is a method of controlling the supply of a clock signal to a logic circuit, especially, a logic circuit composed of C-MOS gates for further reducing the power consumption. According to the control method, a clock signal supply inhibit instruction is stored, so that, when this instruction is read out, the supply of the clock signal to the logic circuit is inhibited, or its level is fixed at a specific signal level. In response to the application of an interrupt signal, the clock signal having been inhibited to be supplied to the logic circuit starts to be supplied to the logic circuit again. The circuit region or regions for which the supply of the clock signal is to be inhibited can be freely selected for the purpose of control. Thus, the method is especially effective when it is desired to closely control the saving of power consumed by the logic circuit.

Title
Data processing apparatus with clock signal control by microinstruction for reduced power consumption and method therefor
Application Number
315058
Publication Number
4615005
Application Date
July 20, 1984
Publication Date
September 30, 1986
Inventor
Yasushi Akao
Kodaira
JP
Toshimasa Kihara
Tachikawa
JP
Koyo Katsura
Hitachi
JP
Hideo Maejima
Hitachi
JP
Agent
Antonelli Terry & Wands
Assignee
Hitachi
JP
IPC
G06F 7/38
G06F 11/00
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