04609986 is referenced by 334 patents and cites 6 patents.

An electrically programmable, eraseable and reprogrammable, monolithic integrated circuit logic array device is disclosed. The device includes a plurality of three types of logic array macrocells, each including an AND array matrix of EPROM transistors configured to form a plurality of "product terms" which are fed into another matrix comprised of "OR" gates, the outputs of which form sum-of-products expressions of the inputs to the AND arrays. Also contained in the macrocells are simple EPROM transistors which, when combined with other appropriate circuitry, form control elements, a plurality of storage registers (D flip-flops), feedback drivers, input drivers and output drivers, all integrated on the same substrate. The input drivers and feedback drivers provide input signals to the AND arrays and the outputs from the D flip-flops can be directed to either the feedback drivers or the output drivers. Control of data sources and destinations is determined by the control elements which in turn are determined by single EPROM transistors. Thus, the architecture as well as the logic function is programmable.

Title
Programmable logic array device using EPROM technology
Application Number
6/620451
Publication Number
4609986
Application Date
June 14, 1984
Publication Date
September 2, 1986
Inventor
Jung Hsing Ou
Sunnyvale
CA, US
Robert Frankovich
Cupertino
CA, US
Yiu Fai Chan
Saratoga
CA, US
Robert F Hartmann
San Jose
CA, US
Agent
Hamrick Hoffman Guillot & Kazubowski
Assignee
Altera Corporation
CA, US
IPC
G06F 7/38
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