A cassette type semiconductor memory device is provided with a RAM and a back-up battery within a cassette, with a connector connected to the main frame of a data processor. The RAM and its periphery circuit, as well, are backed up by the battery. The live-line insertion/removal of the memory pack is detected by monitoring the power source voltage. At this time, memory access is prohibited. Further, flow of current from the main frame into the power source line is prevented.