A digital image generator (DIG) that realizes a modular architecture. The DIG employes a geometric processor that processes a plurality of prioritized faces which comprise an image to be displayed. The faces, in turn, comprise a plurality of picture elements (pixels) which are processed according to whether a skip over logic device determines that the pixels are visible and not occulted. Pixels that are in fact visible are processed, in part, by a Bed of Nails (BON) device-spatial filter device combination. This combination provides quantization of a visible pixel at a subpixel resolution level. Pixels that have been so processed are stored in a frame buffer memory for input to a display.