04539622 is referenced by 42 patents and cites 12 patents.

A hybrid integrated circuit device comprising in combination, a semiconductor integrated circuit element (1) and a film resistor pattern (7). The film resistor pattern is formed on the outer surface of a base (6) which is mounted on a multilayer ceramic package (2) which incorporates the element (1). In this assembled and operated hybrid device, function trimming of the film resistor pattern can be carried out by using a computer and testing is easier than is capable with prior art devices.

Title
Hybrid integrated circuit device
Application Number
390873
Publication Number
4539622
Application Date
October 25, 1984
Publication Date
September 3, 1985
Inventor
Hidehiko Akasaki
Kawasaki
JP
Agent
Staas & Halsey
Assignee
Fujitsu
JP
IPC
H05K 1/14
H05K 1/09
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