04538105 is referenced by 67 patents and cites 10 patents.

The present invention is directed to an improved test wafer for testing the overlay alignment of a second level pattern over a first level pattern for testing lithographic equipment used in making microcircuits, which includes four conductors with circuitry provided for each conductor measuring the conductance thereof, the conductors being constructed and arranged so that the conductance of the first conductor relative to the second conductor, and the conductance of the third conductor relative to the fourth conductor is indicative of the offset of said first level pattern with respect to said second level pattern. In another form of the invention four additional conductors are provided with circuitry provided for each conductor for measuring the conductance thereof, the additional conductors being constructed and arranged so that the relative conductance thereof is indicative of the offset of said first level pattern with respect to said second level pattern in a direction orthogonal with respect to the offset of the first group of four conductors.

Title
Overlay test wafer
Application Number
327862
Publication Number
4538105
Application Date
April 28, 1983
Publication Date
August 27, 1985
Inventor
Christopher P Ausschnitt
Southport
CT, US
Agent
F L Masselle
E T Grimes
Thomas P Murphy
Assignee
The Perkin Elmer Corporation
CT, US
IPC
H01L 21/66
G01R 27/14
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