04519076 is referenced by 17 patents and cites 11 patents.

A means for testing the threshold voltage changes in a programmable and erasable floating gate memory cell by accessing directly and exclusively the cells in the core, and the amplifiers that sense the operation of the cells, so as to measure the relative currents therein as an indication of threshold voltage parameters.

Title
Memory core testing system
Application Number
6/334699
Publication Number
4519076
Application Date
December 28, 1981
Publication Date
May 21, 1985
Inventor
Mark S Ebel
Santa Clara
CA, US
Giora Yaron
Cupertino
CA, US
Ury Priel
Cupertino
CA, US
Agent
Gail W Woodward
Paul J Winters
Michael J Pollock
Assignee
National Semiconductor Corporation
CA, US
IPC
G06F 11/22
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