04494190 is referenced by 30 patents and cites 11 patents.

A minicomputer system is disclosed having a megabus with a plurality of processors and/or subprocessors, input/output (I/O) units and including logic for enabling the detection, decoding, storage and dispatching of data and instructions between the megabus and associated processors. The logic detects information addressed to its associated processors and synchronizes the transfers between the independently timed asynchronous processors and the units attached to the megabus.

Title
FIFO buffer to cache memory
Application Number
6/377299
Publication Number
4494190
Application Date
May 12, 1982
Publication Date
January 15, 1985
Inventor
Arthur Peters
Sudbury
MA, US
Agent
N Prasinos
Assignee
Honeywell Information Systems
MA, US
IPC
G06F 13/00
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