04493026 is referenced by 72 patents and cites 10 patents.

A cache memory for a data processing system having a tag array in which each tag word represents a predetermined plurality or block group of consecutively addressable data block locations in a data array. The lower order set address bits concurrently access the tag word and its associated group of block locations in the data array while individual blocks within the group are accessed by supplemental block bits. Each tag word read out must compare equal with the high order bits of the address and an accompanying validity bit for each block location in its group must be set in order to effect a hit. Also described are circuits for writing into the cache and adapting the cache to a multi-cache arrangement.

Title
Set associative sector cache
Application Number
6/382040
Publication Number
4493026
Application Date
May 26, 1982
Publication Date
January 8, 1985
Inventor
Howard T Olnowich
Endwell
NY, US
Agent
John H Bouchard
Assignee
International Business Machines Corporation
NY, US
IPC
G06F 13/00
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