A synthesizer comprises a basic synthesizer (1) generating a frequency Fo+.xi., wherein .xi. can be varied by small incremental steps, and a phase-locking loop (including a divider 2, a comparator 3, a filter 6, a mixer 4) setting the frequency of an intermediate oscillator (5) to a value Fi=(Fo+.xi.)/(NR+M), wherein NR+M is the division rate of divider 2. A fractional multiplier including an output oscillator 8, a mixer 9, harmonic generators 7 to 12, a divider 13 and a phase comparator 11 multiplies intermediate oscillator frequency Fi by N+(M/R), wherein R preferably is 5. The synthesizer can be used to synthesize frequencies up to several gigahertz.