04454578 is referenced by 126 patents and cites 13 patents.

A data processing unit for executing variable length instructions in which operand specifiers for specifying addressing modes of operands are independent from operation codes for ascertaining operations is disclosed. An instruction fetch unit includes an instruction buffer for prefetching and retaining instructions from a memory and alignment means for aligning the instructions from the instruction buffer such that the instruction includes at least one operand specifier in one machine cycle, and provides it to a decoding unit. The decoding unit includes an operation code decoder and two operand specifier decoders to decode two operand specifiers simultaneously when the last operand specifier is a register designation mode. Each of the units executes instructions in a pipelined fashion and processes operands in a pipelined fashion.

Title
Data processing unit with pipelined operands
Application Number
6/265168
Publication Number
4454578
Application Date
May 19, 1981
Publication Date
June 12, 1984
Inventor
Hideo Maejima
Hitachi
JP
Tadaaki Bandoh
Ibaraki
JP
Hidekazu Matsumoto
Hitachi
JP
Agent
Antonelli Terry & Wands
Assignee
Hitachi
JP
IPC
G06F 9/36
G06F 9/34
G06F 9/42
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