04426681 is referenced by 69 patents and cites 8 patents.

A data processing system includes at least two processors, each having a cache memory containing an index section and a memory section. A first processor performs a task by deriving internal requests for its cache memory which also may respond to an external request derived from the other processor which is simultaneously processing a task. To avoid a conflict between the simultaneous processing of an internal request and of an external request by the same cache memory, one request may act on the other by delaying its enabling or by suspending its processing from the instant at which these requests are required to operate simultaneously on the index section or the memory section of the cache memory of the processor affected by these requests. Thereby, the tasks are performed by the system at an increased speed.

Title
Process and device for managing the conflicts raised by multiple access to same cache memory of a digital data processing system having plural processors, each having a cache memory
Application Number
6/227222
Publication Number
4426681
Application Date
January 22, 1981
Publication Date
January 17, 1984
Inventor
Michel Isert
Paris
FR
Pierre C A Bacot
Chaville
FR
Agent
Lowe King Price & Becker
Assignee
CII Honeywell Bull
FR
IPC
G06F 15/16
G06F 13/00
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