04344156 is referenced by 65 patents and cites 2 patents.

A system is described for use in a semiconductor memory for rapidly transferring data between a plurality of successive memory locations and a data output buss. The system includes a plurality of data latches for storing data derived from successive locations in memory, and a corresponding plurality of serially coupled decoders, each associated with one of the data latches. In response to an address input, one decoder is enabled for causing its associated data latch to output its stored data to the data buss. The latter decoder then disables itself and enables the next decoder so that a second latch outputs its stored data. The process continues with each decoder disabling itself and enabling the next decoder so that the data latches are caused to sequentially output their stored data.

Title
High speed data transfer for a semiconductor memory
Application Number
6/195729
Publication Number
4344156
Application Date
October 10, 1980
Publication Date
August 10, 1982
Inventor
David R Wooten
Colorado Springs
CO, US
Sargent S Eaton Jr
Colorado Springs
CO, US
Agent
James M Wetzel
Donald E Egan
Assignee
Inmos Corporation
CO, US
IPC
G11C 13/00
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