04253144 is referenced by 184 patents and cites 6 patents.

A network is described wherein a plurality of processors are connected in a hierarchy of levels with provision for communication between the various processors. A Global Memory Module (GMM) and a system hierarchy of processors is described which provides access to a plurality of addressable memory storage units. A multiple number of processors or computer systems are connected to one or more Global Memory Modules whereby memory resources may be shared by multiple processor systems and where control and communications are provided between the processors through the Global Memory Modules. The Global Memory Module may be organized into a hierarchy of Global Memory Module systems whereby processors attached to "lower level" GMM systems may access memory in "higher level" GMM systems. Means are provided whereby a processor in one GMM system may send commands and messages to a processor in another GMM system. Means are provided by which one processor can address another specific processor in the system network or whereby one processor can address an "available" processor in a system designated under a system name, and the network will choose the processor which is "idle" or, if there is no idle processor available, will then choose a processor which is "not engaged", that is to say, a processor which when it finishes its currently scheduled activities, will then be available for processing of a received command and message.

Title
Multi-processor communication network
Application Number
5/971890
Publication Number
4253144
Application Date
December 21, 1978
Publication Date
February 24, 1981
Inventor
John O Besemer
Cerritos
CA, US
Clifford J Bellamy
Malvern
AU
Agent
Kevin R Peterson
Nathan Cass
Alfred W Kozak
Assignee
Burroughs Corporation
MI, US
IPC
G06F 13/00
View Original Source