04250569 is referenced by 128 patents and cites 3 patents.

Disclosed is a semiconductor memory device using semiconductor memory elements as memory cells. Each semiconductor memory element is provided with a semiconductor region having a particular conductivity type, a source region and a drain region both having opposite conductivity type and both being located adjacent to the semiconductor region, one on each side of the semiconductor region, so that the semiconductor region functions as a separator between the source region and the drain region, and a gate electrode which is provided over the surface of the semiconductor region on a dielectric insulation film. In the semiconductor memory device, information is written in the semiconductor memory element by injecting electric charges into the semiconductor region, and the written information is read by detecting a variation of the electrical conductance on the surface of the semiconductor region due to the injection of electric charges.

Title
Semiconductor memory device
Application Number
5/960917
Publication Number
4250569
Application Date
November 15, 1978
Publication Date
February 10, 1981
Inventor
Takashi Iwai
Kawasaki
JP
Yasuo Kobayashi
Kawasaki
JP
Moto o Nakano
Yokohama
JP
Nobuo Sasaki
Kawasaki
JP
Agent
Staas and Halsey
Assignee
Fujitsu
JP
IPC
G11C 11/40
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