04225829 is referenced by 5 patents and cites 4 patents.

A first phase locked loop produces a local oscillator signal. The output of a second phase locked loop is connected to the input of the first phase locked loop. A first variable frequency divider is connected in the first phase locked loop. A second variable frequency divider having the same frequency division ratio as the first frequency divider is connected between a variable frequency oscillator and the input of the second phase locked loop. An adder adds a base frequency of preferably 1 MHz to the output frequency of the second frequency divider. With the frequency of the variable frequency oscillator set at a center frequency, the frequency of the local oscillator signal is equal to the frequency division ratio of the frequency dividers multiplied by 1 MHz. Any variation in the frequency of the variable frequency oscillator from the center frequency is algebraically added to the local oscillator frequency, regardless of the frequency division ratio, as an offset frequency. The frequency range of the variable frequency oscillator is low compared to the frequency range of the local oscillator signal, thereby enabling low frequency drift. A gate disables the first phase locked loop when the second phase locked loop is not in lock.

Title
Local oscillator circuit having two phase locked loops having respective frequency dividers with a common division ratio
Application Number
5/963348
Publication Number
4225829
Application Date
November 24, 1978
Publication Date
September 30, 1980
Inventor
Tadashi Kumagai
Soma
JP
Agent
Gerard F Dunne
Guy W Shoup
Assignee
Alps Electric
JP
IPC
H03B 3/04
View Original Source