04153941 is referenced by 20 patents and cites 22 patents.

An electronic data processing system which utilizes a variable timing period that is varied in accordance with the access time of the digital devices or circuits utilized in each step of the data processing program. In one embodiment, the data processing system is a computer which performs the basic arithmetic and logical operations. The computer utilizes three memories which have different access times. One memory stores instruction words specifying steps in a computer program for performing basic arithmetic and logical operations involving predetermined data words; another memory stores the data words; and, the third memory stores control words specifying the various machine operations required to execute the corresponding instruction. The three memories can be read out simultaneously, two at a time, or one at a time. In each case, the timing strobe which initiates the next step in the program is generated immediately after the slowest memory utilized in that step is ready for the next readout. Thus, the timing period in this embodiment varies in accordance with the access time of the slowest memory used in each step of the program.

Title
Timing circuit and method for controlling the operation of cyclical devices
Application Number
5/740795
Publication Number
4153941
Application Date
November 11, 1976
Publication Date
May 8, 1979
Inventor
Richard W Caddell
Brookfield
WI, US
Agent
Donald J Piggott
Cyril M Hajewski
Assignee
Kearney & Trecker Corporation
WI, US
IPC
G06F 1/04
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