04062102 is referenced by 18 patents and cites 8 patents.

A process for manufacturing a solar cell from a reject semiconductor wafer comprising stripping all external layers from the wafer, etching the surfaces of the wafer so as to effectively remove all P/N junctions without pitting the wafer surface, introducing a layer of dopant to form a P/N junction in the front wafer surface, forming a first patterned conductive electrode over the dopant layer, and forming a second conductive electrode on the back surface of the wafer. In the preferred embodiment a sputtering operation is used to form the conductive electrodes.

Title
Process for manufacturing a solar cell from a reject semiconductor wafer
Application Number
5/645791
Publication Number
4062102
Application Date
December 31, 1975
Publication Date
December 13, 1977
Inventor
Icheng Wu
Sunnyvale
CA, US
John E Lawrence
Cupertino
CA, US
Agent
Boone Schatzel Hamrick & Knudsen
Assignee
Silicon Material
CA, US
IPC
B01J 17/00
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