04056845 is referenced by 44 patents and cites 11 patents.

A memory access technique for use in digital data processing apparatus, particularly in mini-computer systems, in which a plurality of memory modules are used, each of the modules having a main memory and a higher speed auxiliary, or "cache" memory, the data in the "cache" memories of a plurality of modules being capable of storage therein in an interleaved manner. Appropriate modifiable interconnection means, such as modifiable jumper connections, are provided on each memory module to permit the modules to be arranged for either interleaved or non-interleaved operation. As additional modules are added to the system, additional "cache" memory storage is automatically added and the capability of higher order interleaving becomes readily possible.

Title
Memory access technique
Application Number
5/571573
Publication Number
4056845
Application Date
April 25, 1975
Publication Date
November 1, 1977
Inventor
William P Churchill Jr
Carlisle
MA, US
Agent
Robert F O Connell
Assignee
Data General Corporation
MA, US
IPC
G06F 13/00
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