04002928 is referenced by 8 patents and cites 9 patents.

Two semiconductor chips having complementary MOS circuits are interconnected by means of an output stage provided on the first chip and an input stage provided on the second chip. The connection is a high-speed connection despite the relatively high internal impedance of the MOS transistors. The output stage incorporates MOS transistors for transforming the signal level to a relatively low level, and the input stage incorporates MOS transistors interconnected as a pulsed trigger or amplifier for restoring the low signal to a relatively high level for connection to other MOS circuits.

Title
Process for transmitting signals between two chips with high-speed complementary MOS circuits
Application Number
5/506840
Publication Number
4002928
Application Date
September 17, 1974
Publication Date
January 11, 1977
Inventor
Michael Pomper
Schliersee
DT
Karl Goser
Munich
DT
Agent
Hill Gross Simpson Van Santen Steadman Chiara & Simpson
Assignee
Siemens Aktiengesellschaft
DT
IPC
H03K 19/08
H03K 17/60
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