03938094 is referenced by 9 patents and cites 5 patents.

A single parallel bus interconnects the various portions of a central processing unit. Data transmission between the various portions of the processor is based on sequential use of the common bus, and is synchronized by control circuitry. Circuit means are included for providing access of the various portions of the processor to the bus, and includes means for generating data on the bus for transmission, and for detecting data transmitted by the bus. To minimize access time to the bus whenever data is to be transmitted, means are provided for precharging the bus to a reference potential and then selectively discharging the bus to correspond to the data to be transmitted. In a different aspect of the invention a common bus is used to transmit data between the processor and computing equipment separate from the processor. In this aspect of the invention, circuitry is provided for detecting current on the bus corresponding to data, and for amplifying this current to a suitable level, and then generating a voltage suitable for transmission by the bus.

Title
Computing system bus
Application Number
176670
Publication Number
3938094
Application Date
August 28, 1973
Publication Date
February 10, 1976
Inventor
Edward R Caudel
Houston
TX, US
Agent
Stephen S Sadacca
Edward J Connors Jr
Harold Levine
Assignee
Texas Instruments Incorporated
TX, US
IPC
G06F 13/00
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