Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

Title
Systems and Methods for Inter-track Interference Compensation
Application Number
13/186174
Publication Number
20120063022
Application Date
July 19, 2011
Publication Date
March 15, 2012
Inventor
Yuan Xing Lee
San Jose
CA, US
Ming Jin
Fremont
CA, US
Erich F Haratsch
Bethlehem
PA, US
Shaohua Yang
San Jose
CA, US
Jongseung Park
Allentown
PA, US
George Mathew
San Jose
CA, US
Assignee
LSI Corporation
IPC
G11B 05/09
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