A microelectronic package includes a microelectronic element having faces and contacts, the microelectronic element having an outer perimeter, and a substrate overlying and spaced from a first face of the microelectronic element, whereby an outer region of the substrate extends beyond the outer perimeter of the microelectronic element. The microelectronic package includes a plurality of etched conductive posts exposed at a surface of the substrate and being electrically interconnected with the microelectronic element, whereby at least one of the etched conductive posts is disposed in the outer region of the substrate. The package includes an encapsulating mold material in contact with the microelectronic element and overlying the outer region of the substrate, the encapsulating mold material extending outside of the etched conductive posts for defining an outermost edge of the microelectronic package.

Title
Microelectronic packages and methods therefor
Application Number
12/789683
Publication Number
20100258956
Application Date
May 28, 2010
Publication Date
October 14, 2010
Inventor
Ilyas Mohammed
Santa Clara
CA, US
John B Riley III
Dallas
TX, US
Sridhar Krishnan
San Francisco
CA, US
Yoichi Kubota
Pleasanton
CA, US
Teck Gyu Kang
San Jose
CA, US
Masud Beroz
San Jose
CA, US
Belgacem Haba
Saratoga
CA, US
Agent
LERNER DAVID et al
NJ, US
Agent
Tessera
NJ, US
Assignee
Tessera
CA, US
IPC
H01L 23/48
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