A microelectronic assembly can include a first microelectronic device and a second microelectronic device. Each microelectronic device has a die structure including at least one semiconductor die and each of the microelectronic devices has a first surface, a second surface remote from the first surface and at least one edge surface extending at angles other than a right angle away from the first and second surfaces. At least one electrically conductive element extends along the first surface onto at least one of the edge surfaces and onto the second surface. At least one conductive element of the first microelectronic device can be conductively bonded to the at least one conductive element of the second microelectronic device to provide an electrically conductive path therebetween.

Title
Wafer level edge stacking
Application Number
12/456349
Publication Number
20090316378
Application Date
June 15, 2009
Publication Date
December 24, 2009
Inventor
Moshe Kriman
Laura Mirkarimi
Sunol
CA, US
Ilyas Mohammed
Santa Clara
CA, US
Belgacem Haba
Saratoga
CA, US
Agent
LERNER DAVID et al
NJ, US
Agent
Tessera
NJ, US
Assignee
Tessera Research
CA, US
IPC
H05K 03/34
H05K 07/02
View Original Source