The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate with a Ge content between 50-95%, and a strained Ge channel formed on the virtual substrate. A gate structure is formed upon the strained Ge channel, whereupon a MOSFET is formed with increased performance over bulk Si. In another embodiment of the invention, a semiconductor structure comprising a relaxed Ge channel layer and a virtual substrate, wherein the relaxed Ge channel layer is disposed above the virtual substrate. In a further aspect of the invention, a relaxed Ge channel MOSFET is provided. The method includes providing a relaxed virtual substrate with a Ge composition of approximately 100% and a relaxed Ge channel formed on the virtual substrate.

Title
STRUCTURE AND METHOD FOR A HIGH-SPEED SEMICONDUCTOR DEVICE HAVING A Ge CHANNEL LAYER
Application Number
11/877186
Publication Number
20080128747
Application Date
October 23, 2007
Publication Date
June 5, 2008
Inventor
Eugene A Fitzgerald
Windham
NH, US
Christopher W Leitz
Manchester
NH, US
Minjoo L Lee
Durham
NC, US
Agent
Goodwin Procter
MA, US
IPC
H01L 21/336
H01L 29/778
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