Increased protection of areas of a chip are provided by both a mask structure of increased robustness in regard to semiconductor manufacturing processes or which can be removed with increased selectivity and controllability in regard to underlying materials, or both. Mask structures are provided which exhibit an interface of a chemical reaction, grain or material type which can be exploited to enhance either or both types of protection. Structures of such masks include TERA material which can be converted or hydrated and selectively etched using a mixture of hydrogen fluoride and a hygroscopic acid or organic solvent, and two layer structures of similar or dissimilar materials.

Title
Methods and structures for protecting one area while processing another area on a chip
Application Number
10/709514
Publication Number
20050255386
Application Date
May 11, 2004
Publication Date
November 17, 2005
Inventor
Harald Okorn Schmidt
Arpan P Mahorowala
(10708), Bronxville
NY, US
Katherina Babich
(10514), Chappaqua
NY, US
Timothy Dalton
(06877), Ridgefield
CT, US
Dirk Pfeiffer
(12540), Dobbs Ferry
NY, US
Carl J Radens
(12540), LaGrangeville
NY, US
Ramachandra Divakaruni
(10562), Ossining
NY, US
Kangguo Cheng
(12508), Beacon
NY, US
Kenneth T Settlemyer
(12570), Poughquag
NY, US
Deok kee Kim
(12590), Wappingers Falls
NY, US
Agent
Whitham Curtis & Christofferson PC
VA, US
Assignee
International Business Machines Corporation
NY, US
IPC
G03F 09/00
H01L 21/331
G03C 05/00
View Original Source