A method of making a multi-layer circuit assembly includes providing a core structure including an inner dielectric element having first and second metal layers on opposite surfaces thereof, forming one or more through vias extending through the metal layers and the inner dielectric element and coating the metal layers and the through vias with a dielectric material to form a coated structure having first and second outer dielectric layers overlying the first and second metal layers respectively and dielectric material lining the through vias. An outer metal layer is then provided over the first and second outer dielectric layers. The coated through vias are then metallized to form metallic via lines which connect the outer metal layers and which are insulated from the first and second metal layers. The outer metal layers are then selectively patterned to form first signal lines overlying the first metal layer and second signal lines overlying the second metal layer. In certain embodiments, blind vias may be formed through the outer dielectric layers to expose one or more regions of the first and second metal layers. The blind vias are then metallized so that at least some of the signal lines are connected to the first and second metal layers.

Title
Method for forming a multi-layer circuit assembly
Application Number
10/843137
Publication Number
20040209439
Application Date
May 11, 2004
Publication Date
October 21, 2004
Inventor
Belgacem Haba
Cupertino
CA, US
Agent
Lerner David Litenberg Krumholz & Mentlik
NJ, US
Assignee
Tessera
CA, US
IPC
H01L 21/4763
H01L 21/76
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