Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer (102, 106) is formed above a lower conductor layer (100) and an upper conductor layer (104, 108) is formed above the dielectric layer. The invention then forms an etch stop layer (200) above the upper conductor layer and the dielectric layer, and forms a hardmask (202) (silicon oxide hardmask, a silicon nitride hardmask, etc.) over the etch stop layer. Next, a photoresist (300) is patterned above the hardmask, which allows the hardmask, the etch stop layer, the dielectric layer, and the lower conductor layer to be etched through the photoresist.

Title
Formation of metal-insulator metal capacitor simultaneously with aluminum metal wiring level using a hardmask
Application Number
1020067025149
Publication Number
1020070028392
Application Date
November 29, 2006
Publication Date
March 12, 2007
Inventor
Waterhouse Barbara
Ramachandran Vidhya
Moon Matthew D
He Zhong Xiang
Gautsch Michael L
Feilchenfeld Natalie
Eshun Ebenezer E
Coolbaugh Douglas D
Assignee
International Business Machines Corporation
IPC
H01L 21/8242
H01L 27/108