1020000037128 is referenced by 12 patents.

PURPOSE: A method for fabricating a semiconductor device having a gate electrode made of polysilicon and germanium is provided to improve the conductivity of the gate electrode and further to prevent variation of a threshold voltage due to boron penetration. CONSTITUTION: After a gate insulating layer(12) is formed on a semiconductor substrate(11), a silicon seed layer(13a) of an amorphous state is formed on the gate insulating layer(12). Next, a polysilicon and germanium layer(14) is deposited on the silicon seed layer(13) and then patterned along with the silicon seed layer(13) to form the gate electrode. Next, impurities for source and drain regions(21a,21b) are implanted, and a resultant structure is then heat-treated. Particularly, in the deposition of the polysilicon and germanium layer(14), polysilicon and germanium are deposited in a crystalline state, and also impurities are in-situ doped thereto. The silicon seed layer(13a) is crystallized through the heat treatment.

Method for fabricating semiconductor device
Application Number
Publication Number
Application Date
June 30, 2000
Publication Date
January 10, 2002
Ahn Tae Hang
Hynix Semiconductor
H01L 21/8232