2002-246571 is referenced by 149 patents.

PROBLEM TO BE SOLVED: To provide a semiconductor memory device where dynamic storage is allowed by a memory cell of a simple transistor.SOLUTION: A memory cell MC of 1 bit comprises one MIS transistor formed at a floating silicon layer. In addition to a first gate 13 for channel formation which is provided between a source 15 and a drain 14 of the MIS transistor, a second gate 20 is provided whose electric potential is fixed for controlling the electric potential of the silicon layer 12 by capacity coupling. The MIS transistor dynamically stores a first data status wherein impact-ionization takes place near a drain junction to set the silicon layer 12 to a first electric potential, and a second data status wherein a forward current is allowed to flow the drain junction to set the silicon layer 12 to a second electric potential.

Semiconductor memory device
Application Number
Publication Number
Application Date
February 15, 2001
Publication Date
August 30, 2002
Osawa Takashi
G11C 11/407
G11C 11/404
H01L 21/8242
H01L 27/108