PROBLEM TO BE SOLVED: To provide a memory control circuit which can damp memory contents by connecting an external memory control circuit to an external connector when any fault occurs at a CPU or memory controller. SOLUTION: External connectors 5 and 8 are prepared for connecting a control signal, address signal and data signal from a memory controller 2 through an FET switch 1 to a memory 3 and connecting the control signal, address signal and data signal with the control of the FET switch 1. By controlling the FET switch from the external connectors, the memory can be controlled from the outside while disconnecting an original memory controller and the memory.

Title
Memory control circuit
Application Number
09-267869
Publication Number
1999-085625
Application Date
September 12, 1997
Publication Date
March 30, 1999
Inventor
Kawakami Takuya
Assignee
Nec
IPC
G06F 12/16