PROBLEM TO BE SOLVED: To obtain timing of an address setting by setting a start address for data access non-synchronizing with a basic clock signal, starting output of data from the start address synchronizing with the basic clock signal from a cycle of a specified number of the basic clock signal, and performing synchronizing operation with the basic clock signal and an external control signal. SOLUTION: Dynamic type, static type, or non-volatile type memory cells are arranged in a matrix type in a memory cell group 11, read out data and written data are stored here. Data access is performed between the memory cell group 11 and the outside through a data I/O section 4. A specifying section 13 sets a continuous address in the memory cell group 11 conforming to a series of address signal externally given under control of a control section 14, and a memory cell to be accessed is accessibly specified.

Title
Memory system
Application Number
10-020904
Publication Number
1998-177787
Application Date
February 2, 1998
Publication Date
June 30, 1998
Inventor
Kuyama Hitoshi
Toda Haruki
Assignee
Toshiba
IPC
G11C 11/407