2011682-A is referenced by 23 patents.
[en] A computer comprises a CPU, an instruction buffer, a main memory, and an associated cache memory. The instruction buffer contains 2 groups of storage locations, A and B (310 and 320). The current sequence of instructions may be stored in either. The CPU detects any transfer instruction in the current sequence and this causes the sequence following the transfer to be loaded into the other group. Thus at the cost of 2 CPU cycles, for loading the first 8 instructions of the transfer sequence in 24-instruction blocks, the CPU is able to continue processing along either the original sequence or the transfer sequence. Each group of locations (310, 320) is controlled by 2 counters, an in Counter (311, 321) for writing into the group and an Out counter (312, 322) for reading from the group.