0602328-A2 is referenced by 12 patents and cites 5 patents.

An interconnect structure for connecting an integrated circuit (IC) chip (70) to a supporting substrate is described. The supporting substrate serves to communicate signals between the IC chip (70) and the "outside world," such as other IC chips. In one embodiment, the interconnect structure comprises an interconnect substrate having a first post (14) disposed on one of its surfaces (13) and a second post (80) disposed on another of its surfaces. One post is for contacting the IC chip and the other is for contacting the major substrate. Each post comprising an elongated body having top (18) and bottom ends (17), with the bottom end being mounted to one of the substrate surfaces (13) and the top end (18) having a substantially flat surface which is substantially co-planer with the substrate surface.; The interconnect substrate further comprises a means (22) for de-concentrating the mechanical stain present at one or both of the top and bottom ends of each post. The first and second posts are electrically coupled to one another so that an electrical signal may pass from IC chip to the supporting substrate, and vice-versa.

Title
Wire interconnect structures for connecting an integrated circuit to a substrate.
Application Number
EP19930115097 19930920
Publication Number
0602328 (A2)
Application Date
September 20, 1993
Publication Date
June 22, 1994
Inventor
Beilin Solomon Isaac
US
Wong Connie Mak
US
Horine David Albert
US
Chou William Tai Hua
US
Moresco Larry Louis
US
Love David George
US
Assignee
Fujitsu
JP
IPC
H01L 23/485
H01L 21/60
H05K 03/40
H01L 23/48
H01L 23/32
H01L 21/02
H05K 03/40
H01L 23/498
H01L 23/485
H01L 23/32
H01L 21/60
H01L 21/48
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