0486829-A2 is referenced by 23 patents and cites 18 patents.

A package (1) comprising a first semiconductor chip (100) with pads for wire bonding and contacts for chip-to-chip interconnection, and a second semiconductor chip (200) also with contacts for chip-to-chip interconnection is mounted on a substrate (4) with a printed circuit (6). The first and second chips are coupled together via respective contacts. Chip-to-chip interconnections can be made by heat hardened silver pastel by anisotropic conductive material (9) or by a tape carrier having printed wires (9') supported by flexible film (8a). The two chips together are tightly-coupled pair having low interconnect capacitances and resistances. The first chip comprises an arithmetic logic unit (ALU), at least one register, a stack pointer, a program counter, and an index register.; The second chip comprises a command register, a command decoder, and a timing generator, the command decoder in communication with the first semiconductor chip, the command register responsive to a program memory located outside the device.

Title
Semiconductor device and semiconductor device packaging system.
Application Number
EP19910118002 19911022
Publication Number
0486829 (A2)
Application Date
October 22, 1991
Publication Date
May 27, 1992
Inventor
Hayashi Yoshimitsu C O Seiko E
JP
Yabushita Tetsuo
JP
Abe Sachiyuki
JP
Tsukamoto Takashi
JP
Assignee
Seiko Epson
JP
IPC
H01L 25/18
H01L 25/10
H01L 25/065
H01L 23/498
H01L 23/492
H01L 21/60
G06F 15/78
H01L 25/18
H01L 25/10
H01L 25/065
H01L 23/48
H01L 23/28
H01L 21/02
G06F 15/76
H01L 25/18
H01L 25/10
H01L 25/065
H01L 23/498
H01L 23/495
H01L 23/492
H01L 23/31
H01L 21/60
G06F 15/78
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