0242010-A1 is referenced by 52 patents and cites 1 patents.

A clock circuit for supplying a clock signal 62 to a data processor 10 is arranged to supply the clock signal at one of a range of frequencies, under the control of the data processor. The processor can instruct the circuit to supply the clock signal at a maximum frequency to provide maximum data processing capacity or it can instruct it to supply a signal at a selected lower frequency in order to reduce power consumption. The effect of the processor can be overridden by an external event, e.g. an interrupt 20, which forces the clock circuit to produce the clock signal at the maximum frequency in order to minimise the delay in processing the interrupt. The clock circuit includes synchronisation circuitry for ensuring that the clock frequency is changed without generating a glitch.

Clock circuit for a data processor.
Application Number
EP19870300232 19870112
Publication Number
0242010 (A1)
Application Date
January 12, 1987
Publication Date
October 21, 1987
Hanna James Thomas
Arroyo Ronald Xavier
G06F 01/00
G06F 15/02
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G06F 01/32
G06F 15/02
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G06F 01/32
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